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Wafer thinning,scribing capability

  • 8-inch, 12-inch wafer thinning capability, thin die stack 50um·
  • The minimum scribe width is 60um

Die stack & Bonding

  • Multi-die stack: WB stack more than 4 lavers.FC+WB stack
  • High density, low arc height (35um), narrow spacing (50um) bonding

SIP Case

SIP Design & Process Capabilities

Case Study
SIP Case：CAN BUS Module
Flip Chip Capacity:90um pitch Cu Pillar150um pitch Solder Bump
Molding: Strip product,0.4/0.45/0.54/06/0.68/0.7/0.8/12/1.5/2.5/4.0mm
Fine pitch: BGAball, ball diameter 200um, ball pitch 300um
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Barrier/seed Deposition
TSV Litho
TSV Etching
TSV Liner
ECD Filling 
CMP
Fan-In WLP
Fan-Out WLP
TSV Interposer
Flip Chip
Other WLP
Bumping
Bumping
Cu Pillar

Cu Pillar/SnAg 

Bumping

Bumping Processes
Bumping generally refers to all bump preparation processes. The main preparation methods mainly include electroplating, printing, and ball mounting. Main technical indicators: bump pitch, bump diameter, bump height, conventional FC bumping achieves mass production with a minimum pitch of 80um, and micro bumping 40um mass production was achieved, and 25um pitch was completed.